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会社のニュース Nvidia Boasts 7 Chips in Production for Vera Rubin Platform, Including Groq 3 LPU

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Nvidia Boasts 7 Chips in Production for Vera Rubin Platform, Including Groq 3 LPU
Nvidia announced a key hardware update at its GPU Technology Conference (GTC) in San Jose today, barely two months after it acquired chip startup Groq and all its intellectual property for $20 billion. Even with the deal only recently finalized, Groq’s Language Processing Unit (LPU) is already in mass production, and is being integrated into Nvidia’s full Vera Rubin chip stack — which now includes a total of seven new chips that have entered production.

Groq was founded in 2016 by former Google engineers who were part of the original Tensor Processing Unit (TPU) team. The company designs custom ASIC chips built specifically for fast, low-latency AI inference processing. Ian Buck, Nvidia’s vice president and general manager of accelerated computing, stated that combining the “extreme flops” of Rubin GPUs with the strong bandwidth of Groq LPUs will create a uniquely powerful solution for AI workloads.

最新の会社ニュース Nvidia Boasts 7 Chips in Production for Vera Rubin Platform, Including Groq 3 LPU  0

“GPUs have large memory and strong floating-point performance, delivering high throughput and fast token rates for the mainstream market, and they excel at general AI tasks,” Buck said in a press briefing the previous day. “But the LPU is optimized solely for extreme low-latency token generation, capable of pushing thousands of tokens per second.”

“The tradeoff is that it takes multiple chips to reach that level of performance,” he added. Each Groq 3 LPU has just 500 MB of SRAM, just 1/500 the memory capacity of Rubin GPUs, according to Buck. “But the bandwidth is exceptional — Rubin GPUs offer up to 22TBps, while Groq LPUs reach 150TB per second.”

Nvidia is working to combine the two processors, Buck confirmed, to unify the GPU’s decoding operations with the LPU’s low-latency work, allowing the two to run as one unified system rather than separate components.

The Groq 3 LPX rack that Nvidia unveiled at GTC will be deployed alongside NVL72 racks, delivering dedicated capacity for AI inference and agentic AI workloads. Per Nvidia’s presentation, the Groq 3 LPX rack can hold up to 256 LPU accelerators, equipped with 128GB of SRAM and a staggering 40 petabytes per second of SRAM memory bandwidth. The rack delivers up to 640TB per second of scale-up bandwidth in total, and Nvidia notes it could eventually scale to house more than 1,000 LPUs.

Pairing a Groq 3 LPX rack with a Rubin NVL72 system enables customers to generate one million tokens for just $45 on a 1 trillion-parameter GPT model with a 400k token context window, according to Nvidia. That figure represents 35 times more tokens than the Rubin NVL72 system can generate on its own.

最新の会社ニュース Nvidia Boasts 7 Chips in Production for Vera Rubin Platform, Including Groq 3 LPU  1

Groq 3 LPUs are not the only new chips Nvidia is leveraging to boost AI inference capacity. The company also announced a dedicated rack for its Vera CPUs — the ARM-based processors paired with two Rubin GPUs to build the superchips at the core of Nvidia’s NVL72 and NVL8 systems.

As CPUs have emerged as a key bottleneck for AI inference and agentic AI workloads, enterprises are increasingly demanding greater CPU resources. In response, Nvidia has launched a standalone CPU-only rack, named the Vera CPU Rack, which features 256 Vera CPUs connected to 400TB of LPDDR5x memory operating at 300TBps.

The Vera CPU Rack also comes equipped with a Spectrum-X Ethernet spine and 64 BlueField-4 data processing units (DPUs). These DPUs coordinate with GPUs in NVL72 systems via Nvidia’s NVLink-C2C interconnect, delivering 1.8TBps of coherent bandwidth — seven times the bandwidth of PCIe Gen 6, per the company.

Nvidia states the Vera rack can support 22,500 concurrent CPU environments, meeting the massive CPU demand required to run AI inference and agentic workloads smoothly. The rack uses liquid cooling and is built on Nvidia’s MGX reference architecture, which the company highlights is backed by 80 ecosystem partners, and it will be distributed through Nvidia’s global partner network.

Nvidia also announced a new rack full of BlueField-4 DPUs, one of the seven new chips that Nvidia touted as making up the new AI supercomputer. The BlueField-4 STX is the first rack-scale implementation of Nvidia’s new CMX (context memory storage) platform, which expands GPU memory from HBM into primary NVMe storage. It unveiled CMX in January, and Nvidia’s storage partners, such as VAST Data, which presented on its CMX storage offering at its conference a few weeks ago, are beginning to adopt it via the Nvidia STX reference architecture.


“The STX is a high-bandwidth, shared layer optimized for storing and retrieving the massive key value cache data generated by agentic workflows,” Buck said. “This is a reference architecture. While Nvidia is not going to be providing it directly, we’re providing [the reference architecture] to all of our storage partners and the entire storage ecosystem so that they can build the next generation of storage for AI factories that has 4x the performance per watt, double the pages per second for enterprise data, and delivering 5x the tokens per second of context memory necessary for AI factories running agentic workflows.”


Cloudian, DDN, Dell Technologies, Everpure (forerly Pure Storage), Hitachi Vantara, HPE, IBM, MinIO, NetApp, Nutanix, and WEKA are all building new storage on the BlueField-4 STX reference architecture, Nvidia said, while companies like CoreWeave, Crusoe, IREN, Lambda, Mistral AI, Nebius, Oracle Cloud Infrastructure (OCI), and Vultr are adopting it.


All told, Nvidia is showcasing seven new chips at GTC that each have a role for powering AI in the Vera Rubin platform. This includes Vera CPU, Rubin GPU, NVLink 6 Switch, ConnectX-9 SuperNIC, BlueField-4 DPU, Groq 3 LPU, and SpectrumX CPO, the new co-packaged optics Ethernet switch that delivers 200 Gbps connectivity over silicon photonics. Nvidia announced the SpectrumX chip at GTC 2025, and it’s now in production, CEO Jensen Huang said in his keynote.


Beijing Qianxing Jietong Technology Co., Ltd.
Sandy Yang/Global Strategy Director
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Email: yangyd@qianxingdata.com
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パブの時間 : 2026-03-18 14:05:18 >> ニュースのリスト
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